1. Field of the Invention
The present invention relates to demodulators for demodulating received PN signals that have the carrier frequency and/or the PN chip rate varied to increase covertness. More particularly, the present invention relates to a novel tunable digital demodulator used to process received tunable carrier frequencies and/or tunable chipping rate signals.
2. Description of the Prior Art
Our U.S. Pat. No. 5,099,494 shows and describes a Six Channel Digital Demodulator which has been implemented on a single chip with other components of the demodulator supporting structure. This demodulator does not include structure which could demodulate tunable carrier frequencies or tunable chipping rates.
Our U.S. Pat. No. 4,841,552 shows and describes a programmable digital second order loop filter of the type used in the carrier recovery loops and in PN code tracking loops of a digital demodulator. The programmable filters in this reference are turnable only through a microprocessor controller which is slow relative to the incoming signal.
Heretofore, it was known that tunable frequency carrier and PN code chipping rates could be modulated on to data being transmitted to increase the covertness of the transmitted signals and to make the signals difficult to jam or to intercept.
It has been suggested that the carrier frequency could be demodulated by employing a variable frequency oscillator at the analog mixer in the first stage of the receiver. When programmable frequency synthesizers are employed to provide the tunable carrier frequency, an analog output is required as the needed input to the analog mixer. Such analog devices are large, complex and expensive when compared to digital devices which may be integrated into one or more semiconductor chips.
It has been suggested that a variable PN chipping rate could be demodulated by employing a variable frequency clock in the PN code clock recovery loop. When programmable frequency clock synthesizers or direct digital synthesizers are employed, the reference clock and the program commands are digital inputs employed to obtain an analog output, thus, this alternative system is large, complex and expensive when compared to pure digital systems.
It would be desirable to provide a digital tunable frequency demodulator that could be implemented on a digital chip with a digital demodulator without the need for expensive off chip analog devices.